Semiconductor devices have been used in a wide range of fields such as system large scale integration (LSI), power conversion apparatuses, and control devices for hybrid vehicles. As such semiconductor devices, for example, one using “solder” or a “solder alloy” containing lead for electrical junction between an electrode terminal of an electronic component and an electrode terminal of a circuit pattern on a circuit board has been once the mainstream.
Meanwhile, the use of lead is severely restricted from the viewpoint of protecting the global environment, and development to use lead within such a restricted scope or to join an electrode or the like of a semiconductor device with a lead-free material has been advanced. In particular, an effective material as an alternative to “high-temperature solder” has not yet been found. Since it is indispensable to use “hierarchical solder” in mounting of a semiconductor device, there is a demand for the appearance of materials substituting for the “high-temperature solder”.
Based on such a background, conventionally, a joining technique of joining electrodes using a composite material of metal particles and an organic compound as a joining material is proposed as a substitute for the “high-temperature solder”.
For example, PTL 1 describes a method of performing junction under reducing atmosphere using a joining material containing a reducing agent consisting of cupric oxide (CuO) particles and an organic substance as a joining technique that can provide excellent joining strength with respect to electrodes of nickel (hereinafter referred to as “Ni”) or copper (hereinafter referred to as “Cu”). In this method, copper particles of 100 nm or smaller are generated during heating and reduction, and the copper particles are sintered and joined. The same PTL further describes that a material containing sintered silver fine particles is used as a joining material that joins a semiconductor chip and a metal plate.
Further, PTL 2 describes a solving method from the viewpoint of stress buffering for eliminating a connecting portion having a large difference in thermal expansion coefficient using a metal plate having an intermediate thermal expansion coefficient between a wiring member and a semiconductor chip, as a technique of improving the reliability of wiring connection.